(China (Mainland))
Product Summary
The MT29F128G08CJABA is a double data rate DDR SDRAM. The MT29F128G08CJABA is a high-speed CMOS, dynamic random-access memory that operates at a frequency of 167 MHz (tCK=6ns) with a peak data transfer rate of 333Mb/s/p. DDR333 continues to use the JEDEC standard SSTL_2 interface and the 2n-prefetch architecture.
Parametrics
MT29F128G08CJABA absolute maximum ratings: (1)TA: 0 to 70°C; (2)VDDQ = +2.5V ±0.2V; (3)VDD = +2.5V ±0.2V.
Features
MT29F128G08CJABA features: (1)167 MHz Clock, 333 Mb/s/p data rate; (2)VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V; (3)Bidirectional data strobe (DQS)transmitted/ received with data, i.e., source-synchronous data capture (x16 has two - one per byte); (4)Internal, pipelined double-data-rate (DDR)architecture; two data accesses per clock cycle; (5)Differential clock inputs (CK and CK#); (6)Commands entered on each positive CK edge; (7)DQS edge-aligned with data for READs; centeraligned with data for WRITEs; (8)DLL to align DQ and DQS transitions with CK; (9)Four internal banks for concurrent operation; (10)Data mask (DM)for masking write data (x16 has two - one per byte).
Diagrams
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